NVIDIA deploys its own Vera CPU to speed up design of next-generation chips
NVIDIA says it is now using its own Vera CPU internally to accelerate the electronic design automation (EDA) work behind its next generations of CPUs and GPUs, delivering measurable speedups on the verification and simulation workloads that dominate modern chip design timelines.
What's new
According to NVIDIA, the Vera CPU delivers "up to 1.5x higher performance on key verification and simulation workloads" compared to prior-generation hardware, with testing focused on formal verification and functional simulation tools from EDA industry leaders Cadence and Synopsys. The chip itself packs 88 custom NVIDIA Olympus CPU cores paired with a high-efficiency LPDDR5X memory subsystem, a configuration NVIDIA designed specifically to accelerate EDA workflows rather than general-purpose compute.
NVIDIA is deploying Vera across its own internal EDA pipeline now, and says it plans to follow this generation with a next-generation Rosa CPU purpose-built for the same role — using specialized silicon for specialized stages of the chip-design process rather than relying on general-purpose compute throughout.
Context
Designing a modern chip requires years of validation work before it ever reaches manufacturing. As NVIDIA describes it, "engineers spend years validating behavior, identifying corner cases and refining designs through thousands of iterations" — logic simulation, formal verification, and digital implementation are each computationally intensive stages that can bottleneck a chip program long before fabrication begins.
Vera itself is the CPU half of NVIDIA's Vera Rubin platform, the company's next-generation data-center compute architecture that pairs a custom Arm-based CPU with Rubin-generation GPUs. Using Vera to design NVIDIA's own future chips is a self-referential move: the company is now running the engineering process for its next products on the current generation of its own hardware.
Why it matters
EDA workloads are a notoriously conservative, benchmark-driven corner of the semiconductor industry, dominated by incumbent CPU architectures that Cadence and Synopsys tools have been tuned against for decades. A credible, measured 1.5x speedup on real verification and simulation workloads — not synthetic benchmarks — is a meaningful data point for NVIDIA's case that custom silicon can beat general-purpose CPUs even in workloads built around decades of x86 optimization. It's also a practical signal of confidence: NVIDIA is willing to bet the schedule of its own next-generation chip programs on Vera, and has already lined up the Rosa CPU as a dedicated successor for the same purpose. For the EDA industry and NVIDIA's data-center customers, it suggests specialized compute for chip-design workflows is likely to become a more explicit product category rather than an internal-only optimization.
Corroborating sources
- Blogs.nvidia
https://blogs.nvidia.com/blog/vera-cpu-eda/
“Long before a chip reaches manufacturing, engineers spend years validating behavior, identifying corner cases and refining designs through thousands of iterations.”